This invention relates to a content addressable memory circuit architecture with unique features. Content addressable memories are referred to as CAMs for brevity and are widely used in conjunction with cache RAM to provide additional features in high performance memories found in present day microprocessors. CAM functional elements are typically loaded with special words representing address, data, or instructions, entries for which the processor might need to do a later search or identity comparison.
The data stored in CAMs are accessed based on their contents, rather than their address. This functionality is useful in many applications, including databases, table look-up, and associative computing. Particularly, the processor might need to know if any special words previously stored in a CAM is identical to a word which the processor holds under consideration for a processor decision. One specific example of CAM usage would be address-protection applications. While CAM functions normally test for completely identical words (words identical in every bit position) it is desirable in address protection applications to have a variable-entry-length feature. This relates to the structure of the CAM as follows. Content addressable memories which have only the completely-identical-word test feature use a single valid-bit storage latch per word location. One digital state of this bit signifies that the word was written by the processor on a previous processor operation and that the entire word qualifies for the identity check.